The operand fields of RSI-format instructions designate two registers and a 16-bit immediate operand.
*--------*----*----*-----------------* |Op Code | R1 | R3 | I2 | *--------*----*----*-----------------* 0 8 12 16 31
Symbols used to represent registers (See REG1 below) are assumed to be equated to absolute values between 0 and 15.
The immediate value is treated as a signed binary integer representing the number of halfwords to branch relative to the current location.
The branch target may be specified as a label in which case the assembler calculates the immediate value and performs some checking of the value.
The branch target may also be specified as an absolute value in which case the assembler issues a warning before it assembles the instruction.
Examples:
ALPHA1 BRXH REG1,REG3,BETA1 BETA1 BRXLE 1,2,ALPHA1
When assembled, the object code for the instruction labeled ALPHA1, in hexadecimal, is
84130002
where:
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