Addresses

You can code a symbol in the name field of a machine instruction statement to represent the address of that instruction. You can then refer to the symbol in the operands of other machine instruction statements. The object code requires that addresses be assembled in a numeric relative-offset or base-displacement format. This format lets you specify addresses that are relocatable or absolute. Program structures and addressing describes how you use symbolic addresses to refer to data in your assembler language program.

Defining Symbolic Addresses: Define relocatable addresses by either using a symbol as the label in the name field of an assembler language statement, or equating a symbol to a relocatable expression.

Define absolute addresses (or values) by equating a symbol to an absolute expression.

Referring to Addresses: You can refer to relocatable and absolute addresses in the operands of machine instruction statements. (Such address references are also called addresses in this manual.) The two ways of coding addresses are:

Implicit address

An implicit address is specified by coding one expression. The expression can be relocatable or absolute. The assembler converts all implicit addresses into their relative-offset or base-displacement form before it assembles them into object code. The assembler converts implicit addresses into explicit base-displacement addresses only if a USING instruction has been specified, or for small absolute expressions, where the address is resolved without a USING. The USING instruction assigns both a base address, from which the assembler computes displacements, and a base register, which is assumed to contain the base address. The base register must be loaded with the correct base address at execution time. For more information, refer to Addressing.

Explicit address

An explicit address is specified by coding two absolute expressions as follows:

An explicit base register designation must not accompany an implicit address. However, in RX-format instructions, an index register can be coded with an implicit address as well as with an explicit address. When two addresses are required, each address can be coded as an explicit address or as an implicit address.

Relative address

A relative address is specified by coding one expression. The expression may be relocatable or absolute. If a relocatable expression is used, then the assembler converts the value to a signed number of halfwords relative to the current location counter, and then uses that value in the object code. An absolute value may be used for a relative address, but the assembler issues a warning message, as it uses the supplied value, and this may cause unpredictable results.

Relocatability of addresses

If the value of an address expression changes when the assumed origin of the program is changed, and changes by the same amount, then the address is simply relocatable. If the addressing expression does not change when the assumed origin of the program is changed, then that address is absolute. If the addressing expression changes by some other amount, the address may be complexly relocatable.

Addresses in the relative-offset or base-displacement form are relocatable, because:

Absolute addresses are also assembled in the base-displacement form, but always indicate a fixed location in virtual storage. This means that the contents of the base register must always be a fixed absolute address value regardless of relocation.

Machine or object code format

Addresses assembled into the object code of machine instructions have the format given in Figure 15. Not all of the instruction formats are shown in Figure 15.

The addresses represented have a value that is the sum of a displacement (see  1  in Figure 15) and the contents of a base register (see  2  in Figure 15).

Index register

In RX-format instructions, the address represented has a value that is the sum of a displacement, the contents of a base register, and the contents of an index register (see  3  in Figure 15).

Figure 15. Format of addresses in object code
Format | Coded or Symbolic |                               Object Code
       | Representation of |                               Representation
       | Explicit Address  |                               of Addresses
-------+-------------------+------------------------------------------------------------------------------
       |                   |
       |                   | |8 bits     |4    |4    |4    |12 bits          |4    |12 bits          |
       |                   | |Operation  |bits |bits |bits |Displacement     |bits |Displacement     |
       |                   | |Code       |     |     |Base |                 |     |                 |
       |                   | |           |     |     |Reg. |                 |     |                 |
       |                   | *-----------+-----+-----+-----+-----------------+-----+-----------------*
       |                   | |           |     |     |  2  |       1         |     |                 |
       |                   | |           |     |     |  V  |       V         |     |                 |
       |                   | * - - - - - + - - + - - +-----+-----------------*     |                 |
RS     | D2(B2)            | |OP CODE    |  R1 |  R3 |  B2 |       D2        |     |                 |
       |                   | * - - - - - * - - * - - *-----*-----------------*     |                 |
       |                   | |                    *-- 3  (Index Register)    |     |                 |
       |                   | |                    V                          |     |                 |
       |                   | * - - - - - * - - * - - *-----*-----------------*     |                 |
RX     | D2(X2,B2)         | |OP CODE    |  R1 |  X2 |  B2 |       D2        |     |                 |
       |                   | * - - - - - * - - * - - *-----*-----------------*     |                 |
       |                   | |                                               |     |                 |
       |                   | |                                               |     |                 |
       |                   | * - - - - - * - - - - - *-----*-----------------*     |                 |
SI     | D1(B1)            | |OP CODE    |    I2     |  B1 |       D1        |     |                 |
       |                   | * - - - - - * - - - - - *-----*-----------------*     |                 |
       |                   | |                                               |  2  |       1         |
       |                   | |                                               |  V  |       V         |
       |                   | * - - - - - * - - - - - *-----*-----------------+-----+-----------------*
SS     | D1(,B1),D2(B2)    | |OP CODE    |     L     |  B1 |       D1        |  B2 |       D2        |
       |                   | * - - - - - * - - - - - *-----*-----------------*-----*-----------------*
I2
represents an immediate value
L
represents a length
B2, R1 and R3
represent registers

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