Registers
You can specify a register in an operand for use as an arithmetic
accumulator, a base register, an index register, and as a general
depository for data to which you want to refer repeatedly.
You must be careful when specifying a register whose contents have
been affected by the execution of another machine instruction,
the control program, or an IBM-supplied system macro instruction.
For some machine instructions, you are limited in which registers
you can specify in an operand.
The expressions used to specify registers must have absolute
values; in general, registers 0 through 15 can be specified for
machine instructions.
However, the following restrictions on register usage apply:
- The even-numbered registers
must be specified for the following groups of instructions:
- The double-shift instructions
- Most multiply and divide instructions
- The move long and compare logical long instructions
- If the NOAFPR ACONTROL operand is specified, then only
the floating-point registers (0, 2, 4, or 6) may be
specified for floating-point instructions.
- If the AFPR ACONTROL operand is specified, then one of
the floating-point registers 0, 1, 4, 5, 8, 9, 12 or 13
can be specified for
the instructions that use extended floating-point data
in pairs of registers, such as
AXR, SXR, LTXBR, and SQEBR.
- If the NOAFPR ACONTROL operand is specified, then either
floating-point register 0 or 4
must be specified for
these instructions.
- For a processor with a vector facility, the even-numbered vector
registers (0, 2, 4, 6, 8, 10, 12, 14) must be specified in
vector-facility instructions that are used to manipulate long floating-point
data or 64-bit signed binary data in vector registers.
The assembler checks the registers specified in the instruction
statements of the above groups. If the specified register does not
comply with the stated restrictions, the assembler issues a diagnostic
message and does not assemble the instruction. Binary zeros are generated
in place of the machine code.
Register usage by machine instructions
Registers that are not explicitly coded in symbolic assembler
language representation of machine instructions, but are nevertheless
used by assembled machine instructions, are divided into two categories:
- Base registers that are implicit in the symbolic addresses specified.
(See Addresses.)
The registers can be identified by examining the object code or the
USING instructions that assign base registers for the source module.
- Registers that are used by machine instructions, but don't appear in
assembled object code.
- For double shift and fullword multiply and divide instructions, the
odd-numbered register, whose number is one greater than the even-numbered
register specified as the first operand.
- For Move Long and Compare Logical Long instructions, the odd-numbered
registers, whose number is one greater than even-numbered registers
specified in the two operands.
- For Branch on Index High (BXH) and the Branch on Index Low or Equal
(BXLE) instructions, if the register specified for the second operand is
an even-numbered register, the next higher odd-numbered register is used
to contain the value to be used for comparison.
- For Load Multiple
(LM, LAM) and Store Multiple (STM, STAM)
instructions, the
registers that lie between the registers specified in the first two
operands.
- For extended-precision floating point instructions, the second
register of the register pair.
- For Compare and Form Codeword (CFC) instruction, registers 1, 2 and 3
are used.
- For Translate and Test (TRT) instruction, registers 1 and 2 are used.
- For Update Tree (UPT) instruction, registers 0-5 are used.
- For Edit and Mark (EDMK) instruction, register 1 is used.
- For certain control instructions, one or more of registers 0-4 and
register 14 are used. See "Control Instructions" in the applicable
Principles of Operation manual.
- For certain input/output instructions, either or both registers 1 and
2 are used. See "Input/Output Instructions" in the applicable
Principles of Operation manual.
- On a processor with a vector facility:
- For instructions that manipulate long floating-point data in
vector registers, the odd-numbered vector registers, whose number is one
greater than the even-numbered vector registers specified in each
operand.
- For instructions that manipulate 64-bit signed binary data in
vector registers, the odd-numbered vector registers, whose number is one
greater than the even-numbered vector registers specified in each
operand.
Register usage by system
The programming interface of the system control programs uses
registers 0, 1, 13, 14, and 15.
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