Rational Developer for System z
Enterprise PL/I for z/OS, Version 3.8, Programming Guide

ARCH

The ARCH option specifies the architecture for which the executable program's instructions are to be generated. It allows the optimizer to take advantage of specific hardware instruction sets. A subparameter specifies the group to which a model number belongs.

Read syntax diagramSkip visual syntax diagram            .-5-.
>>-ARCH--(--+-n-+--)-------------------------------------------><
 

The current values that may be specified for the ARCH level are:

5
Produces code that uses instructions available on model 2064-100 (z/900) in z/Architecture mode.

Specifically, these ARCH(5) machines and their follow-ons include instructions such as NILL, NILH, OILL, OILH, LLILL and LLILH.

6
Produces code that uses instructions available on the 2084-xxx (z990) and 2086-xxx (z890) models in z/Architecture mode.

Specifically, the compiler on these ARCH(6) machines and their follow-ons may exploit the long-displacement instruction set. The long-displacement facility provides a 20-bit signed displacement field in 69 previously existing instructions (by using a previously unused byte in the instructions) and 44 new instructions. A 20-bit signed displacement allows relative addressing of up to 524,287 bytes beyond the location designated by a base register or base and index register pair and up to 524,288 bytes before that location. The enhanced previously existing instructions generally are ones that handle 64-bit binary integers. The new instructions generally are new versions of instructions for 32-bit binary integers. The new instructions also include

The long-displacement facility provides register-constraint relief by reducing the need for base registers, code size reduction by allowing fewer instructions to be used, and additional improved performance through removal of possible address-generation interlocks.

7
Produces code that uses instructions available on the 2094-xxx models in z/Architecture mode.

Specifically, these ARCH(7) machines and their follow-ons add instructions supported by facilities such as extended-immediate and extended translation facilities, which may be exploited by the compiler. For further information on these facilities, refer to z/Architecture Principles of Operation.

ARCH(7) machines also support the DFP instructions.

8
Produces code that uses instructions available on the 2097-xxx models (IBM System z10 EC) in z/Architecture mode.

Specifically, these ARCH(8) machines and their follow-ons add instructions supported by the general instruction extensions facility, which may be exploited by the compiler. Also, these machines add instructions supported by the decimal floating-point facility, which are generated if the DFP compiler option is specified and there are decimal floating-point data types in the source code. For further information on these facilities, refer to z/Architecture Principles of Operation.

If you specify an ARCH value less than 5, the compiler will reset it to 5.

Note:
The "x" in the model numbers above (such as 9672-Rx4 is a "wildcard" and stands for any alphanumeric machine of that type, such as 9627-RA4).
Note:
Code that is compiled at ARCH(n) runs on machines in the ARCH(m) group if and only if m >= n.

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