Work Product (Artifact): Design

WorkProductDescriptor

Work Product (Artifact): Design - Cell Hierarchy

A design is some larger scale integrated group of functions, achieved by interconnection of sub-design elements like IP blocks.

Purpose

A larger, or “complete” functional unit that is convenient to group, this may indeed be a sub-system in yet a larger scale design. For example a serial communication interface circuit design could have some control circuitry, a number of transmitter and receiver circuits, each made up of a group of interface, amplifier, modulator and demodulator and digital data handling circuits. Yet the serial interface maybe reused several times, perhaps with variation, even in a larger design or chip. For instance modern Systems on a chip often have multiple serial communications interfaces for the USB and I2C standards.

Relationships

Roles	Responsible:	Modified By: Analog Designer Design Authority
Input To	Mandatory: Approve Design Perform Analog Design Review Design, Library and Cells	Optional: None	External: None
Output From	Identify Library Configuration Perform Analog Design

Main Description

Electronic design can be represented in a variety of ways according to technology and design flow.

For High level design the primary representations are:

Sub-system Requirements Specification
Interface control document
Electronic System level models e.g. SysML, UML, SystemC
System level IP blocks
System level verification IP blocks
Hardware descriptions e.g. Register transfer level (RTL), VHDL, Verilog
System verification results e.g. trace verification IP output

For analog design the primary representations are:

Circuit Schematics
Circuit functions used e.g. symbols, functions
Circuit connections e.g. netlists, connection lists, signal lists, from-to’s
Circuit models e.g. behavior, performance, fault, verification, signal integrity, electromagnetic interference, thermal
Signal characteristics e.g. signal type, level, class
Circuit layouts – floorplans, physical geometry
Circuit parameter extraction e.g. parasitics
Circuit checks e.g. Layout vs Schematic
Circuit layout manufacturing and test e.g. GDSII, IPC350
Circuit device programming e.g. JTAG
Digital and Verification IP blocks are not addressed in this configuration of the Solution for Electronic Design.

Properties

Optional
Planned

Tailoring

Representation Options

The main aspect of tailoring addressed via the Solution for Electronic Design are naming of design, library or cell versions which present design or design elements.

Other relevant areas are the naming of Enhancement Requests and Change Request to reflect the design area or function under change or primary activity e.g. modeling, schematics, layout, analysis, simulation or manufacturing data generation.

Naming or structuring of designs or libraries to facilitate parallel working and re-use are related concerns.